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Statistical model of program/verify algorithms in resistive-switching memories for in-memory neural network accelerators
Glukhov, A.; Milo, V.; Baroni, A.; Lepri, N.; Zambelli, C.; Olivo, P.; Perez, E.; Wenger, C.; Ielmini, D.     dettagli >>

Atto di Convegno (Proceedings)
Institute of Electrical and Electronics Engineers Inc., IEEE International Reliability Physics Symposium Proceedings
Vol. 2022-, No. 1, pp: 31-37, Anno: 2022

Experimental verification and benchmark of in-memory principal component analysis by crosspoint arrays of resistive switching memory
Mannocci, P.; Baroni, A.; Melacarne, E.; Zambelli, C.; Olivo, P.; Perez, E.; Wenger, C.; Ielmini, D.     dettagli >>

Atto di Convegno (Proceedings)
Institute of Electrical and Electronics Engineers Inc., Proceedings - IEEE International Symposium on Circuits and Systems
Vol. 2022, No. 1, pp: 326-330, Anno: 2022

Low Conductance State Drift Characterization and Mitigation in Resistive Switching Memories (RRAM) for Artificial Neural Networks
Baroni, A.; Glukhov, A.; Perez, E.; Wenger, C.; Ielmini, D.; Olivo, P.; Zambelli, C.     dettagli >>

Contributo in rivista (Pubblicazione in Rivista)
IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY
Vol. 22, No. 3, pp: 340-347, Anno: 2022

End-to-end modeling of variability-aware neural networks based on resistive-switching memory arrays
Glukhov, A; Lepri, N; Milo, V; Baroni, A; Zambelli, C; Olivo, P; Perez, E; Wenger, C; Ielmini, D     dettagli >>

Atto di Convegno (Proceedings)
IEEE Computer Society, IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC
pp: 1-5, Anno: 2022

An energy-efficient in-memory computing architecture for survival data analysis based on resistive switching memories
Baroni, A.; Glukhov, A.; Perez, E.; Wenger, C.; Calore, E.; Schifano, S. F.; Olivo, P.; Ielmini, D.; Zambelli, C.     dettagli >>

Contributo in rivista (Pubblicazione in Rivista)
FRONTIERS IN NEUROSCIENCE
Vol. 16, No. 1, pp: 932270-1-932270-16, Anno: 2022

In-Memory Principal Component Analysis by Crosspoint Array of Resistive Switching Memory: A new hardware approach for energy-efficient data analysis in edge computing
Mannocci, P.; Baroni, A.; Melacarne, E.; Zambelli, C.; Olivo, P.; Perez, E.; Wenger, C.; Ielmini, D.     dettagli >>

Contributo in rivista (Pubblicazione in Rivista)
IEEE NANOTECHNOLOGY MAGAZINE
Vol. 16, No. 2, pp: 4-13, Anno: 2022

Assessing the role of program suspend operation in 3d nand flash based solid state drives
Zambelli, C.; Zuolo, L.; Aldarese, A.; Scommegna, S.; Micheloni, R.; Olivo, P.     dettagli >>

Contributo in rivista (Pubblicazione in Rivista)
ELECTRONICS
Vol. 10, No. 12, pp: 1394-1-1394-18, Anno: 2021

A scalable bidimensional randomization scheme for tlc 3d nand flash memories
Favalli, M.; Zambelli, C.; Marelli, A.; Micheloni, R.; Olivo, P.     dettagli >>

Contributo in rivista (Pubblicazione in Rivista)
MICROMACHINES
Vol. 12, No. 7, pp: 759-1-759-14, Anno: 2021

Investigating 3D NAND Flash Read Disturb Reliability with Extreme Value Analysis
Zambelli, C.; Crippa, L.; Micheloni, R.; Olivo, P.     dettagli >>

Contributo in rivista (Pubblicazione in Rivista)
IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY
Vol. 21, No. 4, pp: 486-493, Anno: 2021

Optimized programming algorithms for multilevel RRAM in hardware neural networks
Milo, V.; Anzalone, F.; Zambelli, C.; Perez, E.; Mahadevaiah, M. K.; Ossorio, O. G.; Olivo, P.; Wenger, C.; Ielmini, D.     dettagli >>

Atto di Convegno (Proceedings)
Institute of Electrical and Electronics Engineers Inc., IEEE International Reliability Physics Symposium Proceedings
Vol. 2021, No. 1, pp: 1-6, Anno: 2021

Accurate Program/Verify Schemes of Resistive Switching Memory (RRAM) for In-Memory Neural Network Circuits
Milo, V.; Glukhov, A.; Perez, E.; Zambelli, C.; Lepri, N.; Mahadevaiah, M. K.; Quesada, E. P. -B.; Olivo, P.; Wenger, C.; Ielmini, D.     dettagli >>

Contributo in rivista (Pubblicazione in Rivista)
IEEE TRANSACTIONS ON ELECTRON DEVICES
Vol. 68, No. 8, pp: 3832-3837, Anno: 2021

First Evidence of Temporary Read Errors in TLC 3D-NAND Flash Memories Exiting from an Idle State
Zambelli, C.; Micheloni, R.; Scommegna, S.; Olivo, P.     dettagli >>

Contributo in rivista (Pubblicazione in Rivista)
IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY
Vol. 8, No. 1, pp: 8956089-99-8956089-104, Anno: 2020

Mitigating self-heating in solid state drives for industrial internet-of-things edge gateways
Zambelli, C.; Zuolo, L.; Crippa, L.; Micheloni, R.; Olivo, P.     dettagli >>

Contributo in rivista (Pubblicazione in Rivista)
ELECTRONICS
Vol. 9, No. 7, pp: 1179-1-1179-17, Anno: 2020

Reliability of Logic-in-Memory Circuits in Resistive Memory Arrays
Zanotti, T.; Zambelli, C.; Puglisi, F. M.; Milo, V.; Perez, E.; Mahadevaiah, M. K.; Ossorio, O. G.; Wenger, C.; Pavan, P.; Olivo, P.; Ielmini, D.     dettagli >>

Contributo in rivista (Pubblicazione in Rivista)
IEEE TRANSACTIONS ON ELECTRON DEVICES
Vol. 67, No. 11, pp: 4611-4615, Anno: 2020

Multilevel HfO2-based RRAM devices for low-power neuromorphic networks
Milo, V.; Zambelli, C.; Olivo, P.; Perez, E.; K. Mahadevaiah, M.; G. Ossorio, O.; Wenger, C.; Ielmini, D.     dettagli >>

Contributo in rivista (Pubblicazione in Rivista)
APL MATERIALS
Vol. 7, No. 8, pp: 081120-1-081120-10, Anno: 2019

Low-energy inference machine with multilevel HfO2 RRAM arrays
Milo, V.; Zambelli, C.; Olivo, P.; Perez, E.; Ossorio, O. G.; Wenger, C.; Ielmini, D.     dettagli >>

Atto di Convegno (Proceedings)
IEEE, European Solid-State Device Research Conference
Vol. 2019, No. 1, pp: 174-177, Anno: 2019

LDPC Soft Decoding with Improved Performance in 1X-2X MLC and TLC NAND Flash-Based Solid State Drives
Zuolo, L.; Zambelli, C.; Marelli, A.; Micheloni, R.; Olivo, P.     dettagli >>

Contributo in rivista (Pubblicazione in Rivista)
IEEE TRANSACTIONS ON EMERGING TOPICS IN COMPUTING
Vol. 7, No. 3, pp: 507-515, Anno: 2019

Reliability challenges in 3D NAND Flash memories
Zambelli, C.; Micheloni, R.; Olivo, P.     dettagli >>

Atto di Convegno (Proceedings)
Institute of Electrical and Electronics Engineers Inc., 2019 IEEE 11th International Memory Workshop, IMW 2019
pp: 1-8739741-4, Anno: 2019

Toward Reliable Multi-Level Operation in RRAM Arrays: Improving Post-Algorithm Stability and Assessing Endurance/Data Retention
Perez, E.; Zambelli, C.; Mahadevaiah, M. K.; Olivo, P.; Wenger, C.     dettagli >>

Contributo in rivista (Pubblicazione in Rivista)
IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY
Vol. 7, No. 1, pp: 740-747, Anno: 2019

Enabling Computational Storage Through FPGA Neural Network Accelerator for Enterprise SSD
Zambelli, C.; Bertaggia, R.; Zuolo, L.; Micheloni, R.; Olivo, P.     dettagli >>

Contributo in rivista (Pubblicazione in Rivista)
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. II, EXPRESS BRIEFS
Vol. 66, No. 10, pp: 1738-1742, Anno: 2019

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